Prasanth Chatarasi

Registered user since Mon 20 Jun 2016

Name:Prasanth Chatarasi
Bio:

Prasanth Chatarasi is a Senior Research Scientist at IBM T.J. Watson Research Center where he leads research and development of scheduling and code generation for programmable dataflow accelerators, including IBM’s Spyre accelerator. He focuses on compiler optimizations, dataflow architectures, and hardware–software co-design for next-generation AI systems. He brings over 12 years of experience in compiler research and engineering, spanning a diverse range of hardware technologies — from multi/many-core CPUs and GPUs to graph accelerators and ASIC/FPGA machine learning accelerators.

Prasanth received his Ph.D. in Computer Science from Georgia Institute of Technology in 2020, under the guidance of Prof. Vivek Sarkar, where he worked on advancing compilation techniques for general-purpose and domain-specific high-performance systems, and his M.S. from Rice University in 2017 with a thesis on polyhedral optimizations for explicitly parallel programs. He has published in top-tier compiler and architecture venues (e.g., PLDI, ISCA, MICRO, CGO, PACT), holds multiple patents in compiler technology, and actively collaborates with academic partners on various aspects of compiler research.

Country:United States
Affiliation:IBM Research
Research interests:Compilers, Machine Learning, Polyhedral model, HPC

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